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| XD010-22S-D2F Product Description Sirenza Microdevices' XD010-22S-D2F 12W power module is a robust 2stage Class A/AB amplifier module for use in the driver stages of GSM/ EDGE RF power amplifiers for cellular base stations. The power transistors are fabricated using Sirenza's latest, high performance LDMOS process. This unit operates from a single voltage and has internal temperature compensation of the bias voltage to ensure stable performance over the full temperature range. It is a drop-in, no-tune solution for medium power applications requiring high efficiency, excellent linearity, and unit-to-unit repeatability. It is internally matched to 50 ohms. 1805-1880 MHz Class A/AB 12W Power Amplifier Module Functional Block Diagram Stage 1 Stage 2 Product Features Temperature Compensation Temperature Compensation * * * * * * * 4 5 50 W RF impedance 12W Output P1dB Single Supply Operation : Nominally 28V High Gain: 31 dB at 1840 MHz High Efficiency: 25% at 1840 MHz Advanced, XeMOS II LDMOS FETS Temperature Compensation 1 2 3 Applications RF in VD1 VD2 Case Flange = Ground RF out * * * Base Station PA driver Repeater GSM / EDGE Key Specifications Symbol Frequency P1dB Gain Gain Flatness IRL Efficiency Linearity Delay Phase Linearity RTH, j-l RTH, j-2 Parameter Frequency of Operation Output Power at 1dB Compression (single tone) Gain at 5W Output Power (CW) Peak to Peak Gain Variation Input Return Loss 5W Output (CW) Drain Efficiency at 10W CW RMS EVM at 5W EDGE output Peak EVM at 5W EDGE output 3rd Order IMD at 10W PEP (Two Tone; 1MHz F) Electrical Delay Deviation from Linear Phase (Peak to Peak) Thermal Resistance Stage 1 (Junction to Case) Thermal Resistance Stage 2 (Junction to Case) Unit MHz W dB dB dB % % % dBc nS Deg C/W C/W -26 10 20 Min. 1805 10 28.5 12 31 0.5 14 25 1.5 5 -32 2.5 0.5 11 4 1.0 Typ. Max. 1880 Test Conditions Zin = Zout = 50, VDD = 28.0V, IDQ1 = 230mA, IDQ2 = 115mA, TFlange = 25C The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or omissions. Sirenza Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any thrid party. Sirenza Microdevices does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems. Copyright 2003 Sirenza Microdevices, Inc. All worldwide rights reserved. 303 S. Technology Court, Broomfield, CO 80021 Phone: (800) SMI-MMIC 1 http://www.sirenza.com EDS-102930 Rev C XD010-22S-D2F 1805-1880 MHz 12W Power Amp Module Quality Specifications Parameter ESD Rating MTTF Human Body Model, JEDEC Document - JESD22-A114-B 85 C Leadframe, 200 C Channel o o Unit V Hours Typical 8000 1.2 X 106 Pin Description Pin # 1 2 3,4 5 Flange Function RF Input VD1 VD2 RF Output Gnd Description Module RF input. Care must be taken to protect against video transients that may damage the active devices. This is the drain voltage for the first stage of the amplifier module. The first stage gate bias is temperature compensated to maintain constant quiscent drain current over the operating temperature range. Nominally +28Vdc See Note 1. This is the drain voltage for the 2nd stage of the amplifier module. The 2nd stage gate bias is temperature compensated to maintain constant quiscent drain current over the operating temperature range. Nominally +28Vdc See Note 1. Module RF output. Care must be taken to protect against video transients that may damage the active devices. Exposed area on the bottom side of the package needs to be mechanically attached to the ground plane of the board for optimum thermal and RF performance. See mounting instructions in application note AN-060 on Sirenza's web site. Simplified Device Schematic 2 VD1 3 4 VD2 Note 1: The internally generated gate voltage is thermally compensated to maintain constant quiescent current over the temperature range listed in the data sheet. No compensation is provided for gain changes with temperature. This can only be accomplished with AGC external to the module. Note 2: Internal RF decoupling is included on all bias leads. No additional bypass elements are required, however some applications may require energy storage on the drain leads to accommodate time-varying waveforms. Note 3: This module was designed to have its leads hand soldered to an adjacent PCB. The maximum soldering iron tip temperature should not exceed 700 C, and the soldering iron tip should not be in direct contact with the lead for longer than 10 seconds. Refer to app note AN060 (www.sirenza.com) for further installation instructions. Temperature Compensation Temperature Compensation RF in 1 Q1 Q2 RF out 5 Case Flange = Ground Absolute Maximum Ratings Parameters 1st Stage Bias Voltage (VD1 ) 2nd Stage Bias Voltage (VD2) RF Input Power Load Impedance for Continuous Operation Without Damage Output Device Channel Temperature Operating Temperature Range Storage Temperature Range Value 35 35 +20 5:1 +200 -20 to +90 -40 to +100 Unit V V dBm VSWR C C C Operation of this device beyond any one of these limits may cause permanent damage. For reliable continuous operation see typical setup values specified in the table on page one. Caution: ESD Sensitive Appropriate precaution in handling, packaging and testing devices must be observed. http://www.sirenza.com EDS-102930 Rev C 303 S. Technology Court Broomfield, CO 80021 Phone: (800) SMI-MMIC 2 XD010-22S-D2F 1805-1880 MHz 12W Power Amp Module Typical Performance Curves EVM, Id vs. Output Power and Temperature Freq=1840 MHz, Vdd=28 V, TFlange=-20C, 25C, 90C EVM @-20C EVM @ 25C EVM @ 90C Id @-20C Id @ 25C Id @ 90C 4.5 4 3.5 3 EVM (%) 2.5 2 1.5 1 0.5 0 0 5 Gain (dB), Efficiency (%), EVM (%) 4.5 4 3.5 Id (Amps) 3 2.5 2 1.5 1 0.5 35 30 25 20 15 10 5 0 0 1 Gain, Efficiency, EVM vs. Output Power Freq=1840 MHz, Vdd=28 V, TFlange= 25C Gain Efficiency EVM 1 2 3 Output Power (W) 4 5 6 2 3 4 5 6 7 8 Output Power (W) 30 25 Gain (dB), EVM (%) 20 15 10 5 0 0 Gain, EVM vs. Output Power and Voltage Freq=1840 MHz, Vdd=24 V, 28 V, 32 V, TFlange= 25C Gain (dB), Efficiency (%), EVM (%) 35 30 25 20 15 Gain, Efficiency, EVM vs. Frequency Freq=1840 MHz, Vdd=28 V, TFlange= 25C Gain @ 24VDC Gain @ 28VDC Gain @ 32VDC EVM @ 24VDC EVM @ 28VDC EVM @ 32VDC Gain 10 5 0 1790 Efficiency EVM 2 4 6 Output Power (W) 8 10 12 1800 1810 1820 1830 1840 1850 1860 1870 1880 1890 Frequency (MHz) Gain, Efficiency vs. Output Power and Temperature Freq=1840 MHz, Vdd=28 V, TFlange=-20C, 25C, 90C 35 30 Gain (dB), Efficiency (%) 25 Two Tone IMD vs. Output Power and Temperature Freq=1840 MHz, Vdd=28 V, TFlange=-20C, 25C, 90C 0 -5 -10 -15 IMD (dBc) IMD @-20C IMD @ 25C IMD @ 90C 20 15 10 5 0 0 1 2 3 4 5 6 7 8 -20 -25 -30 -35 -40 -45 0 1 Gain @-20C Gain @ 25C Gain @ 90C Efficiency @-20C Efficiency @ 25C Efficiency @ 90C Output Power (W) 2 3 Output Power (W) 4 5 6 303 S. Technology Court Broomfield, CO 80021 Phone: (800) SMI-MMIC 3 http://www.sirenza.com EDS-102930 Rev C XD010-22S-D2F 1805-1880 MHz 12W Power Amp Module Test Board Schematic with module attachments shown Test Board Bill of Materials Component PCB J1, J2 J3 C1, C10 C2, C20 C3, C30 C25, C26 C21, C22 C23, C24 Mounting Screws Description Rogers 4350, er=3.5 Thickness=30mils SMA, RF, Panel Mount Tab W / Flange MTA Post Header, 6 Pin, Rectangle, Polarized, Surface Mount Cap, 10mF, 35V, 10%, Tant, Elect, D Cap, 0.1mF, 100V, 10%, 1206 Cap, 1000pF, 100V, 10%, 1206 Cap, 68pF, 250V, 5%, 0603 Cap, 0.1mF, 100V, 10%, 0805 Cap, 1000pF, 100V, 10%, 0603 4-40 X 0.250" Manufacturer Rogers Johnson AMP Kemet Johanson Johanson ATC Panasonic AVX Various Test Board Layout To receive Gerber files, DXF drawings, a detailed BOM, and assembly recommendations for the test board with fixture, contact applications support at support@sirenza.com. Data sheet for evaluation circuit (XD010-EVAL) available from Sirenza website. 303 S. Technology Court Broomfield, CO 80021 Phone: (800) SMI-MMIC 4 http://www.sirenza.com EDS-102930 Rev C XD010-22S-D2F 1805-1880 MHz 12W Power Amp Module Package Outline Drawing Recommended PCB Cutout and Landing Pads for the D2F Package Note 3: Dimensions are in inches Refer to Application note AN-060 "Installation Instructions for XD Module Series" for additional mounting info. App note availbale at at www.sirenza.com 303 S. Technology Court Broomfield, CO 80021 Phone: (800) SMI-MMIC 5 http://www.sirenza.com EDS-102930 Rev C |
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